Topic
Instructions
Ladder instructions explained by what they do on each scan: timers, counters, one-shots, moves, maths, comparisons, sequencers, shift registers and subroutines.
13 articles
Studio 5000 MSG instruction: path, setup and error codes
The MSG instruction reads or writes a block of data in another device, asynchronously, starting when its rung goes from false to true. You choose a message type, source, length and destination, then a path of port and address pairs such as 1, 2, 2, 192.168.1.20, 1, 0. If it fails, .ER sets, .ERR holds the error code and .EXERR the extended code.
10 min readSequencer instructions, and the state machine that replaced them
SQO steps through a file of output patterns, writing one row to a destination each time it is triggered, which drives a fixed repeating sequence of outputs. SQI compares inputs against a file of expected patterns to advance. They were memory efficient on early controllers and are hard to read and hard to modify, so new code usually implements the same behaviour as an explicit state machine.
6 min readFIFO and LIFO: tracking parts that are already moving
FIFO load and unload maintain a first in, first out queue in a data file, used to carry information about parts through a process: a part is loaded with its data at the infeed and unloaded in the same order at the outfeed. LIFO does the same in reverse order, for a stack. The failure mode to design against is a part removed from the line by hand, which leaves the queue permanently offset.
6 min readBit shift registers, and the conveyor they were made for
A bit shift register holds one bit per physical position on a conveyor and shifts every bit one place each time the conveyor advances one pitch. The bit shifted in at the input end represents the item just loaded; the bit shifted out at the other end drives the reject or diverter. The shift must be triggered by a one shot on the position sensor, or a slow conveyor shifts the register many times per index.
6 min readIndirect addressing: one rung instead of forty
Indirect addressing uses the value of one tag as the index into an array of others, so the same rung can act on any element depending on a pointer. It replaces forty near identical rungs with one rung and a loop. The danger is an index outside the array, which on most controllers is a major fault that stops the processor, so every index must be range checked before it is used.
7 min readUser defined types: naming the thing instead of the address
A user defined type is a structure that groups related tags under one name, so a valve becomes a single tag with members for its command, its feedback, its fault and its timer. It makes the tag table describe the plant rather than the memory map, makes an array of forty identical devices trivial, and centralises a change. The cost is that changing the type on a running system usually requires a download.
7 min readAdd-on instructions: reuse that survives being copied
An add-on instruction packages logic and its data into a reusable block that appears on a rung like a built in instruction. Each instance carries its own data, so ten valves using the same AOI have ten independent sets of state. It differs from a subroutine, which shares whatever tags it is given, and from a UDT, which is data with no behaviour.
7 min readTON, TOF and RTO: which timer, and why it matters
All three count while their rung is true and differ entirely in what happens when it goes false. A TON resets to zero. A TOF starts counting down and holds its output on until the preset expires. An RTO keeps its accumulated value and resumes from there, and only clears when explicitly reset.
5 min readCounters: CTU, CTD, and the reset everyone forgets
A count-up instruction increments its accumulator once per false-to-true transition of its rung, not once per scan, and sets its done bit when the accumulator reaches the preset. It keeps counting past the preset and never clears itself. Every counter needs an explicit reset, and forgetting one is the most common counter fault in the field.
6 min readOne shots: doing something exactly once
A one shot, also written ONS or OSR, passes rung power for exactly one scan on each false-to-true transition of its input. It exists because most inputs are levels held for hundreds of scans, while most actions should happen once. It remembers the previous state of its own rung, which is why two one shots on the same tag behave independently.
5 min readMOV, ADD and the rest: maths in ladder logic
Maths instructions in ladder sit on the output side, so they execute only while the rung is true. A MOV copies a source to a destination; ADD, SUB, MUL and DIV take two operands and a destination. Because they are conditional, an unconditional calculation needs an always-true rung, and integer division truncates rather than rounding.
6 min readComparison instructions and the analog value that is never equal
Comparison instructions sit on the condition side and pass rung power when the comparison is true. EQU tests equality, NEQ inequality, GRT and LES magnitude, GEQ and LEQ inclusive magnitude. Testing an analog value for exact equality almost never works, because a measured value passes through the target between scans rather than landing on it.
5 min readSubroutines: structuring a program somebody else can read
A jump-to-subroutine instruction calls another routine, which runs to completion and returns to the next rung. Routines are how a program becomes navigable rather than one enormous ladder. The two traps are that a routine which is never called looks exactly like logic that does not work, and that outputs in an uncalled routine hold their last value.
6 min read